In this documentation you will find technical background information on the SC/MP-CPU (say SCAMP) from National Semiconductor. This is additional information for those who want to work with the SC/MP Emulator. We will cover some history, hardware info, PIN-OUT-description, CPU-register-set, addressing-modes, the instruction-set and some sample programs. Below is a screendump of the emulator.

National Semiconductor introduced the SC/MP-In April 1976, almost 25 years to this day. It was intended for small industrial controllers, appliances and entertainment devices. The acronym SC/MP stand for Small Cost-effective Micro Processor. It needed few external components by the standards of those days and was easy to program. Nowadays one would use small embedded controllers like PICs or 804X/805X-chips for the same purposes.

In The Netherlands the SC/MP was frequently used in climate control applications used in the greenhouses of The Westland region near Delft and The Hague. In 1977 Elektor Magazine devoted a substantial number of issues to the SC/MP so the reader could get first-hand knowledge of a new phenomenon; "The Microprocessor". The Elektor design came in two versions. The first design is as emulated by me (although my emulator has many features not covered in the original hardware). The second design featured a hexadecimal keyboard and 8x 7-segments-led display. And had a true monitor program in ROM, cassette interface and the option to connect a VDU.

Eventally I build both designs, but the first version was my virgin experience with computer hardware and it stuck. So from a nostalgic point of view I found it worth while to devote some time over the last couple of years to write the emulator. It is written in Visual Basic 6.0 and the reader is free to examine and fiddle with the source-code.

In the right part of the above image you can see that the SC/MP has 40 pinouts. At the left a block diagram of the SC/MP-Is shown.

The SC/MP has a rather mini-computerlike architecture and can address a total of 65536 bytes memory locations by means of a 16-bit address-bus. Because only 12 of these address lines are directly connected to pinouts, simple applications could disregard the 4 MSB-address lines that were multiplexed on the data bus during the NADS-signal. This would result in a design with a lower chipcount. The 65k memory locations are divided in 16x 4096-bytes called pages. Only a limited number of memory reference instructions can cross a page boundary, so the SC/MP was often used with rather limited amount of memory.

My most complicated design featured 9Kbytes of RAM and Tiny-basic in 4K ROM. It was hooked up to a VDU, an ASR33 Teletype and had a cassette-interface for storage. Nevertheless in 1978 I was the first at my school to deliver notes and projects in a typed form and had some crude textprocessing software on this SC/MP-system to pull it off.

The SC/MP-chip was developed in two versions. The SC/MP-I in P-MOS technology had a positive power supply of 5 Volts and a negative supply of 7 Volts. Later National Semiconductor introduced the SC/MP-II that was made in N-MOS technology and had a single 5 Volt power need. Three of the signals on the SC/MP-II were logically reversed (i.e. BREQ became NBREQ) so the SC/MP-II is not 100% pin-compatible with the SC/MP-I. The SC/MP-II could be clocked with a four times higher frequency (4 MHZ) but this was internally divided by two, so the SC/MP-II was effectively 2x faster than the SC/MP-I. So back then kludging a SC/MP-II in your SC/MP-I system certainly was an option, double speed .. Wow!

In the diagram below a simple SC/MP system is shown. Nowadays this logic could be implemented on one chip a 1000 times over, and you would still have space to add additional features. (grin)

The SC/MP is connected by means of an addressbus and a databus to a ROM and 2 RAM chips. The program in ROM first has to be developed in a development-system. Possible variations on this theme could be the addition of a 7-segment LED-display and a keyboard to facilitate a user-interface. In a controller application one might want to add a few solid-state-relays to switch a large load. The SC/MP has 3 direct outputs (FLAGS) that could be used for this. It even has a rudimentary serial I/O capability on chip that could be turned in to a very crude Analog-to-Digital-Converter (ADC). Nice for measuring temperature or other analog data that doesn't require high speed sampling.

The Elektor design on which my emulator is based did not require a monitor-program in ROM. By fiddling with the address- and data switches you could dump (latch) binary data straight into the 256-bytes of RAM and then run the program. Just like an old minicomputer or an Altair. My emulator has the added features of loading and dumping memory image or loading a small pseudo-assembly program into RAM, but on the real thing you had to fiddle with dip-switches each time you wanted to work with it, and no way to save your work. (arrrhhh!!). Needless to say I got rather proficient at thinking in binary and hexadecimal.

OK, The SC/MP was not exactly a powerfull microprocessor as compared with contemporary chips like the P4 and the Athlon, but at the time it was affordable (~ U$25,- ) in relation to CPUs like the 8080 for which you would still had to fork out U$100 and which also required a lot of additional chips to make a basic system.

The SC/MP only an instructionset of 46 basic instructions and was rather easy to program at the binary level. Remember you needed to hand-assemble all programs on a 8080 that would have been a major task for a startup like me! All in all it was a nice learning experience.

There is one feature of the SC/MP that is not widely known: It has build-in multi-processor capabilities. You can actually connect up to three SC/MP chips in one simple system and let them run on the same address- and databus cooperating in the execution of their task. The SC/MP contains logic for a BUS-request and BUS-grant system that enables 3 SC/MPs to access the busses in a synchronised daisy-chain fashion. Propably more than three SC/MP could be connected in this way but this would saturate the use of the bus and outweigh the advantage of using additional chips. Nevertheless multiprocessing build-in was quite a advanced feature in 1976.

The multi-processor arbitration logic can also be abused to implement a DMA (Direct Memory Access) transaction but save the arbitration logic all DMA-logic must be implemented external to the CPU with other of the shelf logic. Some 8080 support chips can be used in conjunction with the SC/MP.

In order for the SC/MP to easily communicate with the outside world the SC/MP has three outputlines directly connected to pinouts (Flags 0,1 & 2) and two inputlines (Sens A & B). Sense A can also be used as an interupt request line in the interupt enable flag in the status-register is set. Furthermore it has a build-in serial I/O capability by means of the SIN and SOUT lines that can shift data in and out of the extension-register. Al lot of applications used one of the flags and one of the sense-lines (Sense B) as an additional serial interface under program control. In this way I was later able to hook up a VDU (simple terminal) and a cassette-interface. The VDU could even be switched for the ASR33 teletype to allow for hardcopy. Remember that all these facilities came directly from the SC/MP chip, save for some buffering devices. The SC/MP signals are TTL-compatible and could drive a load of 2 to 4 74LSXX devices without buffering. Where speed was not a great factor CMOS-logic could be used to diminish loaddriving needs. The chip was rather rugged and could sustain a lot of abuse, altough I did mange to blow up a flag-output line once.

The table below describes the various SC/MP signals and pinouts.

The SC/MP executes either 1- or 2-byte instructions. The first byte is called the OPCODE the optional second byte is the OPERAND. Whenever the most significant byte of the OPCODE is set high it will signify a 2-byte instruction. In that case the programcounter (P0) is automatically incremented and the second byte is feched.

Most 2-byte instructions are memory-reference instruction that will access memory external to the CPU. With the exception of the ILD and the DLD instruction, upon calculating the effective address based on the opcode and the operand the SC/MP will initiate a single byte read or write memory access. The ILD and the DLD however instruction will do a read-modify-write instruction. During these two cycles the bus will be locked for any other (external) operation. So DMA-circuitry will have to know about this

This is a reasonably standard accumulator-register that contains the result of the most operations and usually holds one of the source operands. Like in the next example:

The extensionregister is a bit of a multi purpose story. It can be used to hold secondary operands to the extension instructions, it can be used to temporarily save the accu and it can be used as an 8-bit index register to facilitate relative indirect addressing. Whenever the 2nd-byte operand of a memory-reference instruction (called the displacement) holds a value of &H80 the content of the extension register is taken as the displacement instead of the 2nd-byte operand.

Furthermore the extension register is also used for the build-in serial I/O capability of the SC/MP. The MSB of the extension register is connected to the SIN-input and the LSB is connected to the SOUT-output line. A number of timed serial shift instructions can now be issued to input and output serial data (if desired simultaneously).

The status register contains a number of rather standard flags like the carrylink-flag and the overflow-flag and the interupt-enable-flag. However, the carry and overflow flags are not directly tested by branch-instructions. They must be copied to the accu first (CAS-instruction) and their state must be ascertained with bitwise logical instructions. Branch-testing is only done on the state of the accu-register.

The other status bits are:

• Flag F0, F1 & F2 that are connected to the flag pinout for output.
• Sense SA & SB that are connected to the sense input pinouts.

When interupts are enabled by setting the interupt enable flag the Sense A pinout will double as a interupt input. Upon an interupt the SC/MP will automatically execute a XPPC3 instruction. Pointer-register P3 will have to point to an interupt service-routine. XPPC3 will exchange the content of the PC with P3 when the interupt triggers. No CPU-registers are saved when an interupt occurs, the interupt service-routine must take care of this.

The Pointer-registers P1-P3 are used as datapointer, stackpointer and subroutine/ interupt service pointer respectively.

Pointerregister P0 is used as the Programcounter. The main difference with a normal programcounter is the fact that the SC/MP PC is incremented prior to fetching a new instruction, so the program always continues the next instruction at PC+1.

Another feature of all pointer-registers is the fact that whenever a pointer-register is incremented by a auto-indexed-addressing-mode instruction or an effective address is calculated that crosses a page boundary (i.e. 0FFF->1000) the boundary cross is not taken but the resulting Px-content or effective address folds back to the beginning of the page (0FFF->0000). Only by loading an absolute address into the pointer-register can a page-boundary be crossed!

Apart for the special role of the program-counter an the interupt-service-routine pointer (P3) all pointer-registers function identical. National Semiconductor the following pointer-register roles as a rule of thumb.

Now you are not exactly bound to this role distribution it does make sense to abide by it. Especially with regard to the role of P3 that serves as the pointer to subroutines or the interupt-service-routine.

The XPPC instruction can exchange the content of the PC with any of the other pointer-registers so any Px can service a subroutine but only P3 can service a service-routine for an interupt, because the XPPC3 instruction is generated automatically whenever an interupt is received.

The following code exemplifies the SC/MP subroutine method:

On the next page you will find the opcode matrix. In case of doubt the matrix will always tell the truth for it is used as the "microcode" for the emulator.